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Readout Integrated Circuits (ROICs) 640 x 512

 
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MT6415CA Code
Description

MT6415CA is a low-noise snapshot CTIA ROIC, has a format of 640 x 512 and pixel pitch of 15 mikro m, and has been developed for detector arrays working in the visible, NIR, SWIR, and MWIR part of the spectrum. The ROIC is designed with the system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any external inputs. MT6415CA is a highly configurable ROIC, where many of its features can be programmed through a 3-wire serial interface. It performs snapshot operation both using Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) modes. The CTIA type pixel input circuitry offers three gain modes of very high gain (VHG), high-gain (HG), and low-gain (LG). MT6415CA has an input referred noise level of less than 5 e- rms in the very high gain (VHG) mode, suitable for very low-noise SWIR imaging applications. The low power ROIC design enables a power dissipation of less than 150 mW in the 4-output mode.

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